MTB6N60E1 Datasheet (Motorola)

MTB6N60E1, TMOS POWER FET

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTB6N60E1/D Product Preview TMOS E-FET.™ High Energy Power FET D2PAK-SL Straight Lead N Channel Enhancement Mode Silicon Gate This advanced TMOS E FET is designed to withstand high energy in the avalanche and commutation modes.

The new energy efficient design also offers a drain to source diode with a fast recovery time.

Designed for low voltage, high speed switching applications in power sup

MTB6N60E1 Features

* es an optimally snubbed inductive load. Power MOSFETs may be safely operated into an inductive load; however, snubbing reduces switching losses. 3200 Ciss C, CAPACITANCE (pF) VDS = 0 V VGS = 0 V TJ = 25°C 10000 TJ = 25°C VGS = 0 V Ciss C, CAPACITANCE (pF) 2400 1000 1600 Crss Ciss 100