Description
IS43R83200F IS43/46R16160F, IS43/46R32800F 8Mx32, 16Mx16, 32Mx8 PRELIMINARY INFORMATION 256Mb DDR SDRAM MARCH 2014 .
x8
A0-A12
Row Address Input
A0-A9
Column Address Input
BA0, BA1
Bank Select Address
DQ0.
DQ7
Data I/O
CK, CK
System Clock Input
C.
Features
* DEVICE OVERVIEW
* VDD and VDDQ: 2.5V ± 0.2V
* SSTL_2 compatible I/O
* Double-data rate architecture; two data transfers
per clock cycle
* Bidirectional, data strobe (DQS) is transmitted/
received with data, to be used in capturing data at the receiver
Applications
* where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance
