Datasheet4U Logo Datasheet4U.com

V103 - TRIPLE 10-BIT LVDS TRANSMITTER

Description

The V103 LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display.

Features

  • Pin compatible with THine THC63LVD103.
  • Wide pixel clock range: 8 - 135 MHz.
  • Supports a wide range of video and graphics modes including VGA, SVGA, XGA, SXGA, SXGA+, NTSC, PAL, SDTV, and HDTV up to 1080I or 720P.
  • Internal PLL requires no external loop filter.
  • Selectable rising or falling clock edge for data alignment.
  • Compatible with Spread Spectrum clock source.
  • Reduced LVDS output voltage swing mode (selectable) to minimize EMI.

📥 Download Datasheet

Datasheet Details

Part number V103
Manufacturer Integrated Device Technology
File Size 178.87 KB
Description TRIPLE 10-BIT LVDS TRANSMITTER
Datasheet download datasheet V103 Datasheet

📁 Similar Datasheet

  • V103 - TRIPLE 10-BIT LVDS TRANSMITTER (Renesas)
  • V103A - TRIPLE 10-BIT LVDS TRANSMITTER (Renesas)
  • V10-A500X - Surge Arrester 2-Electrode-Arrester (EPCOS)
  • V10-H08X - Surge Arrester 2-Electrode-Arrester (EPCOS)
  • V10-H14X - Surge Arrester 2-Electrode-Arrester (EPCOS)
  • V10-H22X - Surge Arrester 2-Electrode-Arrester (EPCOS)
  • V10-H30X - Surge Arrester 2-Electrode-Arrester (EPCOS)
  • V1000LA160B - UL Recognized Radial Lead Metal-Oxide Varistors (Harris)
  • V1000LA160B - Line Voltage Operation/ Radial Lead (Littelfuse)
  • V1000LA160BP - Metal-Oxide Varistors (Littelfuse)
Other Datasheets by Integrated Device Technology
  • V103A - TRIPLE 10-BIT LVDS TRANSMITTER

Full PDF Text Transcription

Click to expand full text
V103 TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO General Description The V103 LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display. The data rate supports up to SXGA+ resolutions and can be used in Plasma, Rear Projector, Front Projector, CRT and LCD display applications. It can also be used in other high-bandwidth parallel data applications and provides a low EMI interconnect over a low cost, low bus width cable up to several meters in length. The V103 converts 35 bits of CMOS/TTL data, clocked on the rising or falling edge of an input clock (selectable), into six LVDS (Low Voltage Differential Signaling) serial data stream pairs.
Published: |