Datasheet4U Logo Datasheet4U.com

V103A - TRIPLE 10-BIT LVDS TRANSMITTER

Datasheet Summary

Description

The V103A LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display.

Features

  • Pin compatible with THine THC63LVD103.
  • Wide pixel clock range: 8 - 135 MHz.
  • Guaranteed operation over -20 to +85° C ambient temperature.
  • Supports a wide range of video and graphics modes including VGA, SVGA, XGA, SXGA, SXGA+, NTSC, PAL, SDTV, and HDTV up to 1080I or 720P.
  • Internal PLL requires no external loop filter.
  • Selectable rising or falling clock edge for data alignment.
  • Compatible with Spread Spectrum clock source.
  • R.

📥 Download Datasheet

Datasheet preview – V103A

Datasheet Details

Part number V103A
Manufacturer Renesas
File Size 356.42 KB
Description TRIPLE 10-BIT LVDS TRANSMITTER
Datasheet download datasheet V103A Datasheet
Additional preview pages of the V103A datasheet.
Other Datasheets by Renesas

Full PDF Text Transcription

Click to expand full text
V103A TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO General Description The V103A LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display. The data rate supports up to SXGA+ resolutions and can be used in Plasma, Rear Projector, Front Projector, CRT and LCD display applications. It can also be used in other high-bandwidth parallel data applications and provides a low EMI interconnect over a low cost, low bus width cable up to several meters in length. The V103A converts 35 bits of CMOS/TTL data, clocked on the rising or falling edge of an input clock (selectable), into six LVDS (Low Voltage Differential Signaling) serial data stream pairs.
Published: |