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ICS843002I-72 FEMTOCLOCKS VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR

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Description

www.DataSheet4U.com FEMTOCLOCKS™ VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR ICS843002I-72 GENERAL .
The ICS843002I-72 is a member of the IC S HiperClockS™ family of high performance clock HiPerClockS™ solutions from IDT.

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Datasheet Specifications

Part number
ICS843002I-72
Manufacturer
Integrated Device Technology
File Size
329.67 KB
Datasheet
ICS843002I-72_IntegratedDeviceTechnology.pdf
Description
FEMTOCLOCKS VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR

Features

* Two differential LVPECL outputs
* CLK input accepts the following input levels: LVCMOS or LVTTL levels
* Output frequency: 122.88MHz (typical)
* FemtoClock VCO frequency range: 490MHz - 680MHz
* RMS phase jitter @ 122.88MHz, using a 19.2MHz crystal (1.875MHz

Applications

* where jitter attenuation and frequency translation is needed. The device contains two internal PLL stages that are cascaded in series. The first PLL stage uses a VCXO which is optimized to provide reference clock jitter attenuation and to be jitter tolerant, and to provide a stable reference clock f

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