Datasheet Specifications
- Part number
- ICS843002I-41
- Manufacturer
- Integrated Device Technology
- File Size
- 1.53 MB
- Datasheet
- ICS843002I-41_IntegratedDeviceTechnology.pdf
- Description
- 700MHZ FEMTOCLOCKTM VCXO BASED SONET/SDH JITTER ATTENUATOR
Description
www.DataSheet4U.com 700MHZ, FEMTOCLOCKTM VCXO BASED SONET/SDH JITTER ATTENUATOR ICS843002I-41 .
Features
* Two Differential LVPECL outputs Selectable CLKx, nCLKx differential input pairs CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL or single-ended LVCMOS or LApplications
* where jitter attenuation and frequency translation is needed. The device contains two internal PLL stages that are cascaded in series. The first PLL stage uses a VCXO which is optimized to provide reference clock jitter attenuation and to be jitter tolerant, and to provide a stable reference clock fICS843002I-41 Distributors
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