PA7140 Datasheet (Integrated Circuit Technology) - Programmable Electrically Erasable Logic Array

PA7140, Programmable Electrically Erasable Logic Array

The PA7140 is a member of the Programmable Electrically Erasable Logic (PEEL™) Array family based on ICT’s CMOS EEPROM technology.

PEEL™ Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for today’s programmable logic designs.

The

PA7140 Features

* s Programmable Electrically Erasable Logic Array s Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches - Up to 72 logic cell output functions - PLA structure with true product-term sharing - Logic functions and registers can be I/O-buried High-Speed Commercial and Industr