ESD3V3XU1BL Datasheet (Infineon)

ESD3V3XU1BL, TVS Diode

Pin 1 marking (lasered) Pin 1 Pin 2 Pin 1 Pin 2 a) Pin configuration b) Schematic diagram P G-TS LP-2_Dual_Diode_S erie_P inConf_and_S chematicDiag.

vsd Figure 1-1 Pin Configuration and Schematic Diagram Table 1-1 Ordering Information Type Package ESD3V3XU1BL TSLP-2-17 Configuration 1 li

TVS Diode Transient Voltage Suppressor Diodes ESD3V3XU1BL Bi-directional Ultra Low Capacitance ESD / Transient Protection Diode ESD3V3XU1BL Data Sheet Revision 1.3, 2013-09-11 Final Power Management & Multimarket Edition 2013-09-11 Published by Infineon Technologies AG 81726 Munich, Germany © 2013 Infineon Technologies AG All Rights Reserved.

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With respect to any

ESD3V3XU1BL Features

* ESD / transient protection of high speed data lines exceeding

* IEC61000-4-2 (ESD): ±20 kV (air / contact)

* IEC61000-4-4 (EFT): ±2.5 kV / ±50 A (5/50 ns)

* IEC61000-4-5 (surge): ±3 A (8/20 μs)

* Maximum working voltage: VRWM = ±3.6 V

* Ultra low cap