IS49NLC18160A, IS49NLC93200A - Common I/O RLDRAM 2 Memory

ISSI

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IS49NLC18160A Datasheet Preview — This datasheet PDF includes multiple part numbers: IS49NLC18160A, IS49NLC93200A. Please refer to the document for exact specifications by model.

Datasheet Details

Part number	IS49NLC18160A, IS49NLC93200A
Manufacturer	ISSI
File Size	1.18 MB
Description	Common I/O RLDRAM 2 Memory
Datasheet	IS49NLC93200A-ISSI.pdf
Note	This datasheet PDF includes multiple part numbers: IS49NLC18160A, IS49NLC93200A. Please refer to the document for exact specifications by model.

IS49NLC18160A Product details

Description

1.1 288Mb (32Mx9) Common I/O BGA Ball-out (Top View) 1 2 3 4 56 7 8 9 10 11 12 A VREF VSS VEXT VSS VSS VEXT TMS TCK B VDD DNU3 DNU3 VSSQ VSSQ DQ0 DNU3 VDD C VTT DNU3 DNU3 VDDQ VDDQ DQ1 DNU3 VTT D A221 DNU3 DNU3 VSSQ VSSQ QK0# QK0 VSS E A212 DNU3 DNU3 VDDQ VDDQ DQ2 DNU3 A20 F A5 DNU3 DNU3 VSSQ VSSQ DQ3 DNU3 QVLD G A8 A6 A7 VDD VDD A2 A1 A0 H BA2 A9 VSS VSS J NF2 NF2 VDD VDD K DK DK# VDD VDD VSS VSS A4 A3 VDD VDD

Features

533MHz DDR operation (1.067 Gb/s/pin data rate).
38.4Gb/s peak bandwidth (x36 at 533 MHz clock frequency).
Reduced cycle time (15ns at 533MHz).
32ms refresh (8K refresh for each bank; 64K refresh command must be issued in total, each 32ms).
8 internal banks.
Non-multiplexed addresses (address multiplexing option available).
SRAM-type interface.
Programmable READ latency (RL), row cycle time, and burst sequence length.
Balanced READ and WRITE latencie.

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Other Datasheets by ISSI

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Published: Feb 17, 2024 |