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GTLP18T612 Datasheet - Fairchild Semiconductor

GTLP18T612 18-Bit LVTTL/GTLP Universal Bus Transceiver

The GTLP18T612 is an 18-bit universal bus transceiver which provides LVTTL to GTLP signal level translation. It allows for transparent, latched and clocked modes of data transfer. The device provides a high speed interface for cards operating at LVTTL logic levels and a backplane operating at GTLP l.

GTLP18T612 Features

* s Bidirectional interface between GTLP and LVTTL logic levels s Edge Rate Control to minimize noise on the GTLP port s Power up/down high impedance for live insertion s External VREF pin for receiver threshold s BiCMOS technology for low power dissipation s Bushold data inputs on A Port eliminates t

GTLP18T612 Datasheet (74.88 KB)

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Datasheet Details

Part number:

GTLP18T612

Manufacturer:

Fairchild Semiconductor

File Size:

74.88 KB

Description:

18-bit lvttl/gtlp universal bus transceiver.

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TAGS

GTLP18T612 18-Bit LVTTL GTLP Universal Bus Transceiver Fairchild Semiconductor

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