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74F114 Datasheet - Fairchild Semiconductor

74F114 Dual JK Negative Edge-Triggered Flip-Flop

The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J and K inputs can change when the .

74F114 Datasheet (55.22 KB)

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Datasheet Details

Part number:

74F114

Manufacturer:

Fairchild Semiconductor

File Size:

55.22 KB

Description:

Dual jk negative edge-triggered flip-flop.

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74F114 Dual Negative Edge-Triggered Flip-Flop Fairchild Semiconductor

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