The DFPMU by Digital Core Design is a Floating Point Coprocessor. Below is the official datasheet preview.
| Part number | DFPMU |
|---|---|
| Manufacturer | Digital Core Design |
| File Size | 201.63 KB |
| Description | Floating Point Coprocessor |
| Datasheet |
 DFPMU_DigitalCoreDesign.pdf
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TYPE Input Input Input 1 Exponent Shifter PIN clk rst cs datai[31:0] addr[4:2] we datao[31:0]1 irq 2 DESCRIPTION Global system clock Global system reset Chip select for read/write Data bus input Register address to read/write Data write enable clk rst CORDIC Input Input Input Control Unit Output Data bus output Output Interrupt request indicator 1 data bus can be configured as 8-, 16- or 32- bit depends on processor’s bus size 2 address bus is aligned to work with 8- (
📁 DFPMU Similar Datasheet
