CY23FP12 Datasheet (Cypress) - 200MHz Field Programmable Zero Delay Buffer

CY23FP12, 200MHz Field Programmable Zero Delay Buffer

The CY23FP12 is a high performance fully field-programmable 200 MHz zero delay buffer designed for high speed clock distribution.

The integrated PLL is designed for low jitter and optimized for noise rejection.

These parameters are critical for reference clock distribution in systems using high perf

CY23FP12 Features

* Fully field-programmable

* Input and output dividers

* Inverting/non-inverting outputs

* Phase-locked loop (PLL) or fanout buffer configuration

* 10 MHz to 200 MHz operating range

* Split 2.5 V or 3.3 V outputs

* Two LVCMOS reference inputs

* Twelve low skew outputs