CY7C1321KV18, CY7C1319KV18 Datasheet - Cypress Semiconductor

CY7C1321KV18 18-Mbit DDR II SRAM Four-Word Burst Architecture

CY7C1319KV18 and CY7C1321KV18 are 1.8 V Synchronous Pipelined SRAMs equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a two-bit burst counter. Addresses for read and write are latched on alternate rising edges of the input (K) c.

CY7C1321KV18 Features

* 18-Mbit density (1M × 18, 512K × 36)

* 333-MHz clock for high bandwidth

* Four-word burst for reducing address bus frequency

* Double data rate (DDR) interfaces (data transferred at 666 MHz) at 333 MHz

* Two input clocks (K and K) for precise DDR timing

* SRAM uses rising e

CY7C1319KV18-CypressSemiconductor.pdf

CY7C1321KV18 Datasheet Preview — This datasheet PDF includes multiple part numbers: CY7C1321KV18, CY7C1319KV18. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

CY7C1321KV18, CY7C1319KV18

Manufacturer:

Cypress Semiconductor

File Size:

816.04 KB

Description:

18-mbit ddr ii sram four-word burst architecture.

Note:

This datasheet PDF includes multiple part numbers: CY7C1321KV18, CY7C1319KV18.
Please refer to the document for exact specifications by model.

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TAGS

CY7C1321KV18 CY7C1319KV18 18-Mbit DDR SRAM Four-Word Burst Architecture Cypress Semiconductor

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