CY7C1320BV18, CY7C1316BV18 Datasheet - Cypress Semiconductor

CY7C1320BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture

The CY7C1316BV18, CY7C1916BV18, CY7C1318BV18, and CY7C1320BV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Addresses for Read and Write are latched on alternate ri.

CY7C1320BV18 Features

* 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36)

* 300-MHz clock for high bandwidth

* 2-Word burst for reducing address bus frequency

* Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz

* Two input clocks (K and K) for precise DDR

CY7C1316BV18_CypressSemiconductor.pdf

CY7C1320BV18 Datasheet Preview — This datasheet PDF includes multiple part numbers: CY7C1320BV18, CY7C1316BV18. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

CY7C1320BV18, CY7C1316BV18

Manufacturer:

Cypress Semiconductor

File Size:

551.73 KB

Description:

18-mbit ddr-ii sram 2-word burst architecture.

Note:

This datasheet PDF includes multiple part numbers: CY7C1320BV18, CY7C1316BV18.
Please refer to the document for exact specifications by model.

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TAGS

CY7C1320BV18 CY7C1316BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture Cypress Semiconductor

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