CY7C1315CV18, CY7C1311CV18 - (CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture

Cypress Semiconductor

Datasheet Details

Part number	CY7C1315CV18, CY7C1311CV18
Manufacturer	Cypress Semiconductor
File Size	731.88 KB
Description	(CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
Datasheet	CY7C1311CV18_CypressSemiconductor.pdf
Note	This datasheet PDF includes multiple part numbers: CY7C1315CV18, CY7C1311CV18. Please refer to the document for exact specifications by model.

The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture.

Configurations CY7C1311CV18.
2M x 8 CY7C1911CV18.
2M x 9 CY7C1313CV18.
1M x 18 CY7C1315CV18.
512K x 36 Separate independent read and write data ports.
Supports concurrent transactions 300 MHz clock for high bandwidth 4-word burst for reducing address bus frequency Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 600 MHz) at 300 MHz Two input clocks (K and K) for precise DDR timing.
SRAM uses rising edges onl.

📁 CY7C1315CV18 Similar Datasheet

CY7C131AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
CY7C131E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
CY7C136AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
CY7C136E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
CY7C1370C - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
CY7C1370CV25 - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
CY7C1370D - 18-Mbit (512 K 횞 36/1 M 횞 18) Pipelined SRAM (Cypress)
CY7C1371C - 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture (Cypress)

Other Datasheets by Cypress Semiconductor

Published: Dec 9, 2010 |