CY2PP326 - 2 x 2 Clock and Data Switch Buffer

Cypress Semiconductor

CY2PP326 Datasheet Preview — Preview of CY2PP326 PDF

Datasheet Details

Part number	CY2PP326
Manufacturer	Cypress Semiconductor
File Size	341.84 KB
Description	2 x 2 Clock and Data Switch Buffer
Datasheet	CY2PP326_CypressSemiconductor.pdf

CY2PP326 Product details

Description

The CY2PP326 is a low-skew, low propagation delay 2 x 2 differential clock, data switch, and fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.

Features

Six ECL/PECL differential outputs.
Two ECL/PECL differential inputs.
Hot-swappable/-insertable.
50 ps output-to-output skew.
250 ps device-to-device skew.
950 ps propagation delay (typical).
1.2 GHz Operation.
2.8 ps RMS period jitter (max. ).
PECL mode supply range: VEE =.
2.5V± 5% to.
3.3V±5% with VEE = 0V.
ECL mode supply range: VCC = 2.5V± 5% to 3.3V±5% with VEE = 0V.
Industrial.

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Published: Feb 16, 2009 |