CY2PP326 Datasheet (Cypress Semiconductor) - 2 x 2 Clock and Data Switch Buffer

CY2PP326, 2 x 2 Clock and Data Switch Buffer

The CY2PP326 is a low-skew, low propagation delay 2 x 2 differential clock, data switch, and fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.

The device is implemented on SiGe technology and has a fully differential internal architecture t

CY2PP326 Features

* Six ECL/PECL differential outputs

* Two ECL/PECL differential inputs

* Hot-swappable/-insertable

* 50 ps output-to-output skew

* 250 ps device-to-device skew

* 950 ps propagation delay (typical)

* 1.2 GHz Operation

* 2.8 ps RMS period