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CY2PP3220 - Dual 1:10 Differential Clock / Data Fanout Buffer

Description

The CY2PP3220 is a low-skew, low propagation delay dual 1-to-10 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.

Features

  • Two sets of ten ECL/PECL differential outputs.
  • Two ECL/PECL differential inputs.
  • Hot-swappable/-insertable.
  • 50 ps output-to-output skew.
  • 150 ps device-to-device skew.
  • 500 ps propagation delay (typical).
  • 1.5 GHz Operation (2.7 GHz max. toggle frequency).
  • PECL mode supply range: VCC = 2.5V± 5% to 3.3V±5% with VEE = 0V.
  • ECL mode supply range: VE E =.
  • 2.5V± 5% to.
  • 3.3V±5% with VCC = 0V.
  • Industr.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com FastEdge™ Series CY2PP3220 Dual 1:10 Differential Clock/Data Fanout Buffer Features • Two sets of ten ECL/PECL differential outputs • Two ECL/PECL differential inputs • Hot-swappable/-insertable • 50 ps output-to-output skew • 150 ps device-to-device skew • 500 ps propagation delay (typical) • 1.5 GHz Operation (2.7 GHz max. toggle frequency) • PECL mode supply range: VCC = 2.5V± 5% to 3.3V±5% with VEE = 0V • ECL mode supply range: VE E = –2.5V± 5% to –3.3V±5% with VCC = 0V • Industrial temperature range: –40°C to 85°C • 52-pin 1.
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