CY2PP3210 Datasheet (Cypress Semiconductor) - Dual 1:5 Differential Clock / Data Fanout Buffer

CY2PP3210, Dual 1:5 Differential Clock / Data Fanout Buffer

The CY2PP3210 is a low-skew, low propagation delay dual 1-to-5 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.

The device is implemented on SiGe technology and has a fully differential internal architecture that is optimized

CY2PP3210 Features

* Dual sets of five ECL/PECL differential outputs

* Two ECL/PECL differential inputs

* Hot-swappable/-insertable

* 50 ps output-to-output skew

* 150 ps device-to-device skew

* 500 ps propagation delay (typical)

* 0.8 ps RMS period jitter (max.)