SN74LV125A gates equivalent, quadruple bus buffer gates.
*1 2-V to 5.5-V VCC Operation
* Max tpd of 6 ns at 5 V
* Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
* Typical VOHV (Output VOH .
* Flow Meters
* Solid State Drives (SSDs): Enterprise
* Power Over Ethernet (PoE)
* Programmable Logic C.
The SN74LV125A quadruple bus buffer gate is designed for 2-V to 5.5-V VCC operation.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TVSOP (14)
3.60 mm x 4.40 mm
SOIC (14)
8.65 mm × 3.91 mm
SN74LV125A
SOP (14)
10.30mm x 5.30 mm
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