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SN74LV11A-Q1 - TRIPLE 3-INPUT POSITIVE-AND GATES

Description

This triple 3-input positive-AND gate is designed for 2-V to 5.5-V VCC operation.

B

C or Y + A ) B ) C in positive logic.

This device is fully specified for partial-power-down applications using Ioff.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN74LV11A-Q1 TRIPLE 3-INPUT POSITIVE-AND GATE D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) D 2-V to 5.5-V VCC Operation D Typical VOLP (Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C D Support Mixed-Mode Voltage Operation on All Ports D Ioff Supports Partial-Power-Down Mode Operation SCES468D − JULY 2003 − REVISED JANUARY 2008 PW PACKAGE (TOP VIEW) 1A 1B 2A 2B 2C 2Y GND 1 2 3 4 5 6 7 14 VCC 13 1C 12 1Y 11 3C 10 3B 9 3A 8 3Y description/ordering information This triple 3-input positive-AND gate is designed for 2-V to 5.5-V VCC operation.