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SN65LVDS302 - Programmable 27-Bit Serial-to-Parallel Receiver

Description

The SN65LVDS302 receiver de-serializes FlatLink™3G compliant serial input data to 27 parallel data outputs.

Features

  • Serial interface technology.
  • Compatible with FlatLink™3G such as SN65LVDS301.
  • Supports video interfaces up to 24-bit RGB data and 3 control bits received over 1, 2 or 3 SubLVDS differential lines.
  • SubLVDS differential voltage levels.
  • Up to 1.755-Gbps Data Throughput.
  • Three operating modes to conserve power.
  • Active mode QVGA: 17 mW.
  • Typical shutdown: 0.7 μW.
  • Typical standby mode: 27 μW Typical.
  • Bus-swap fun.

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Part Number Description
SN65LVDS301 Programmable 27-Bit Parallel-to-Serial Transmitter
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.ti.com SN65LVDS302 SLLS733E – JUNE 2006 – REVISESDNO6C5TLOVBDERS2300220 SLLS733E – JUNE 2006 – REVISED OCTOBER 2020 SN65LVDS302 Programmable 27-Bit Serial-to-Parallel Receiver 1 Features • Serial interface technology • Compatible with FlatLink™3G such as SN65LVDS301 • Supports video interfaces up to 24-bit RGB data and 3 control bits received over 1, 2 or 3 SubLVDS differential lines • SubLVDS differential voltage levels • Up to 1.755-Gbps Data Throughput • Three operating modes to conserve power – Active mode QVGA: 17 mW – Typical shutdown: 0.7 μW – Typical standby mode: 27 μW Typical • Bus-swap function for PCB-layout flexibility • ESD rating > 4 kV (HBM) • Pixel clock range of 4 MHz to 65 MHz • Failsafe on all CMOS inputs • Packaged in 5-mm × 5-mm nFBGA with 0.