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TH50VSF3583AASB - MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS

This page provides the datasheet information for the TH50VSF3583AASB, a member of the TH50VSF3582AASB MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS family.

Description

The TH50VSF3582/3583AASB is a mixed multi-chip package containing a 8,388,608-bit Full CMOS SRAM and a 33,554,432-bit flash memory.

The CIOS and CIOF inputs can be used to select the optimal memory configuration.

The power supply.

Features

  • Power supply voltage VCCs = 2.67 V~3.3 V VCCf = 2.67 V~3.3 V www. DataSheet4U. com.
  • Data retention supply voltage VCCs = 1.5 V~3.3 V.
  • Current consumption Operating: 45 mA maximum (CMOS level) Standby: 10 µA maximum (SRAM CMOS level) Standby: 10 µA maximum (FLASH).
  • Block erase architecture for flash memory 8 × 8 Kbytes 63 × 64 Kbytes.
  • Organization.
  • CIOF VCC VCC VSS CIOS VCC VSS VSS Flash Memory 2,097,152 words of 16 bits 2,097,152 words of 16 bits 4,194,.

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Other Datasheets by Toshiba Semiconductor

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TH50VSF3582/3583AASB TENTATIVE TOSHIBA MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE DESCRIPTION The TH50VSF3582/3583AASB is a mixed multi-chip package containing a 8,388,608-bit Full CMOS SRAM and a 33,554,432-bit flash memory. The CIOS and CIOF inputs can be used to select the optimal memory configuration. The power supply. FLASH MEMORY a Simultaneous Read/Write operation so that data can be read during a Write or Erase operation. The TH50VSF3582/3583AASB can range from 2.67 V to 3.3 V. The TH50VSF3582/3583AASB is available in a 69-pin BGA package, making it suitable for a variety of design applications. FEATURES Power supply voltage VCCs = 2.67 V~3.3 V VCCf = 2.67 V~3.3 V www.DataSheet4U.com • Data retention supply voltage VCCs = 1.
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