SLGSSTVF16859V buffer equivalent, ddr 13 to 26 bit registered buffer.
* Compatible with JEDEC standard SSTV16859
* Differential Clock inputs
* SSTL_2 data input signaling
* Supports SSTL_2 class I output specifications
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* PC1600/2100/2700/3200 DDR memory modules
* 1:2 Outputs for stacked DDR DIMMS
* SSTL_2 compatible data reg.
The 14-bit SLGSSTVF16859 is a registered buffer designed for 2.3V to 2.7V VDD operating range. Inputs are SSTL_2 levels, except for the LVCMOS RESET input. Data propagation from D to Q is controlled by the differential clock (CLK/CLK) and a control s.
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