M74HC4094
M74HC4094 is 8-bit SIPO shift latch register manufactured by STMicroelectronics.
Features
- High speed: f MAX = 80 MHz (typ.) at VCC = 6 V
- Low power dissipation:
ICC = 4 μA (max.) at TA= 25 °C
- High noise immunity:
VNIH = VNIL = 28% VCC (min.)
- Symmetrical output impedance:
|IOH| = IOL = 4 m A (min.)
- Balanced propagation delays: t PLH ≅ t PHL
- Wide operating voltage range:
VCC (opr.) = 2 V to 6 V
- Pin and function patible with 74 series
- ESD performance
- CDM: 1 k V
- HBM: 2 k V
- MM: 200 V
Description
The M74HC4094 device is a high speed CMOS 8-bit SIPO shift latch register fabricated with silicon gate C2MOS technology. It consists of an 8-bit shift register and an 8-bit latch with 3-state output buffer. Data is shifted serially through the shift register on the positive going transition of the clock input signal. The output of the last stage (QS) can be used to cascade several devices.
Data on the QS output is transferred to a second output (QS’) on the following negative transition of the clock input signal. The data of each stage of the shift register is provided with a latch, which latches data on the negative going transition of the STROBE input signal. When the STROBE input is held high, data propagates through the latch to a 3-state output buffer. This buffer is enabled when OUTPUT ENABLE input is taken high. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
Order code
Table 1. Device summary
Temperature range
Package
Packaging
Marking
M74HC4094RM13TR M74HC4094YRM13TR(1) M74HC4094TTR M74HC4094YTTR(1)
-55/+125 °C -40/+125 °C -55/+125 °C -40/+125° °C
SO16
SO16 (automotive grade) TSSOP16
Tape and reel
TSSOP16 (automotive grade)
74HC4094 74HC4094Y
HC4094 HC4094Y
1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q002 or equivalent.
October 2013
This is information on a product in full production.
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