ICS9DB102 buffer equivalent, two output differential buffer.
* 2 - 0.7V current mode differential output pairs (HCSL)
Features/Benefits
* CLKREQ# pin for outputs 1 and 4/output enable for Express Card applications
* PL.
* PLL or bypass mode/PLL can dejitter incoming clock
* Selectable PLL bandwidth/minimizes jitter peaking in
down.
The ICS9DB102 zero-delay buffer supports PCI Express clocking requirements. The ICS9DB102 is driven by a differential SRC output pair from an ICS CK410/CK505-compliant main clock. It attenuates jitter on the input clock and has a selectable PLL Band .
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