8741004I attenuator equivalent, differential-to-lvds/0.7v differential jitter attenuator.
* Two LVDS and two 0.7V differential output pairs
Bank A has two LVDS output pairs and Bank B has two 0.7V differential output pairs
* One differential clock inpu.
such as PCI Express add-in cards.
PLL Bandwidth
BW_SEL 0 = PLL Bandwidth: ~200kHz Float = PLL Bandwidth: ~600kHz (defaul.
The 8741004I is a high performance Differential-to-LVDS/0.7V Differential Jitter Attenuator designed for use in PCI Express™ systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low ban.
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