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PLL520-80 - Low Phase Noise VCXO

General Description

The PLL520-80 is a VCXO IC specifically designed to work with fundamental crystals between 19MHz and 65MHz.

The selectable divide by two feature extends the operation range from 9.5MHz to 65MHz.

It requires very low current into the crystal resulting in better overall stability.

Key Features

  • 19MHz to 65MHz fundamental crystal input. Output range: 9.5MHz.
  • 65MHz Complementary outputs: PECL or LVDS output. Selectable OE Logic (enable high or enable low). Available outputs: PECL, LVDS, or CMOS (High Drive (30mA) or Standard Drive (10mA) output). Integrated variable capacitors. Supports 2.5V or 3.3V Power Supply. Available in die form. OUTSEL1^ Reserved VDD VDD VDD VDD N/C (1550,1475) 17 16.

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Datasheet Details

Part number PLL520-80
Manufacturer PhaseLink Corporation
File Size 260.61 KB
Description Low Phase Noise VCXO
Datasheet download datasheet PLL520-80 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PLL520-80 www.DataSheet4U.com Low Phase Noise VCXO (9.5-65MHz) DIE CONFIGURATION OUTSEL0^ 65 mil FEATURES • • • • • • • • 19MHz to 65MHz fundamental crystal input. Output range: 9.5MHz – 65MHz Complementary outputs: PECL or LVDS output. Selectable OE Logic (enable high or enable low). Available outputs: PECL, LVDS, or CMOS (High Drive (30mA) or Standard Drive (10mA) output). Integrated variable capacitors. Supports 2.5V or 3.3V Power Supply. Available in die form.