900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf






Pericom Semiconductor

PI74SSTVF16857A Datasheet Preview

PI74SSTVF16857A Datasheet

14-Bit Registered Buffer

No Preview Available !

PI74SSTVF16857A
1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
14-Bit Registered Buffer
Product Features
Product Description
• Designed for low-voltage operation,
2.5V for PC1600 ~ PC2700; 2.6V for PC3200
• Supports SSTL_2 Class I output specifications
• SSTL_2 Input and Output Levels
• Designed for DDR Memory
• Flow-Through Architecture
• Packaging Options (Lead-free packages are available):
– 48-pin 240 mil wide plastic TSSOP (A)
– 48-pin 173 mil wide plastic TVSOP (K)
PericomSemiconductor’sPI74SSTVF16857A seriesoflogiccircuits
are produced using the Company’s advanced sub-micron CMOS
technology, achieving industry leading speed.
The 14-bit PI74SSTVF16857A universal bus driver is designed
for 2.5V to 2.6V VDD operation and SSTL_2 I/O Levels except for
the RESET input which is LVCMOS.
Data flow from D to Q is controlled by the differential clock , CLK,
CLK and RESET. Data is triggered on the positive edge of CLK.
CLK must be used to maintain noise margins.
Logic Block Diagram
CLK
CLK
RESET
38
39
34
D1
VREF
48
35
R
CLK
D
1 Q1
RESET must be supported with LVCMOS levels as VREF may not
be stable during power-up. RESET is asynchronous and is intended
for power-up only and when low assures that all of the registers reset
to the Low State, Q outputs are low, and all input receivers, data and
clock, are switched off.
Pericom’s PI74SSTVF16857A is characterized for operation from
0° to 70°C.
Product Pin Configuration
TO 13 OTHER CHANNELS
www.DataSheet4U.com
Product Pin Description
PinName Description
RESET
Reset (Active Low)
CLK Clock Input
CLK Clock Input
D Data Input
Q Data Output
GND Ground
VDD
VDDQ
VREF
Core Supply Voltage
Output Supply Voltage
Input Reference Voltage
Truth Table(1)
Inputs
Outputs
RESET CLK CLK
D
Q
L X XX L
H ↑ ↓H H
Η ↑ ↓L
H L or H L or H X
L
Qo(2)
Notes:
1. H = High Signal Level
2.
L = Low Signal Level
= Transition LOW-to-HIGH
= Transition HIGH-to-LOW
Output level before the
indicated steady state
input conditions were
established.
X = Irrelevant
Q1
Q2
GND
VDDQ
Q3
Q4
Q5
GND
VDDQ
Q6
Q7
VDDQ
GND
Q8
Q9
VDDQ
GND
Q10
Q11
Q12
VDDQ
GND
Q13
Q14
1 48
2 47
3 46
4 45
5 44
6 43
7 42
8 41
9 40
10 48-Pin 39
11 A,K 38
12 37
13 36
14 35
15 34
16 33
17 32
18 31
19 30
20 29
21 28
22 27
23 26
24 25
D1
D2
GND
VDD
D3
D4
D5
D6
D7
CLK
CLK
VDD
GND
VREF
RESET
D8
D9
D10
D11
D12
VDD
GND
D13
D14
1
PS8687
05/27/03




Pericom Semiconductor

PI74SSTVF16857A Datasheet Preview

PI74SSTVF16857A Datasheet

14-Bit Registered Buffer

No Preview Available !

PI74SSTVF16857A
14-Bit Registered Buffer1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Parameter
Storage Temperature
Supply Voltage
Input Voltage(1)
Output Voltage(1,2)
Input Clamp Current
Output Clamp Current
Continuous Output Current
VDD, VDDQ, or GND current/pin
Package Thermal Impedance
A-Package
K-Package
Symbol
Tstg
VDD or VDDQ
VI
VO
II K, VI < 0
IO K, VO < 0
IO, VO = 0 to VDDQ
IDD, IDDQ or GND
Ø JA
Ratings
–65 to 150
– 0.5 to 3.6
– 0.5 to VDD + 0.5
– 0.5 to VDDQ + 0.5
– 50
±50
±50
±100
70
58
Units
oC
V
mA
oC/W
Notes:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
1. The input and output negative voltage ratings may be excluded if the input and output clamp ratings are observed.
2. This current will flow only when the output is in the high state level VO > VDDQ.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
2
PS8687
05/27/03


Part Number PI74SSTVF16857A
Description 14-Bit Registered Buffer
Maker Pericom Semiconductor
Total Page 8 Pages
PDF Download

PI74SSTVF16857A Datasheet PDF

View PDF for Mobile








Similar Datasheet

1 PI74SSTVF16857A 14-Bit Registered Buffer
Pericom Semiconductor





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy