PI6C485352 multiplexer equivalent, 500 mhz twelve 2-to-1 differential lvpecl clock multiplexer.
* Pin-to-pin compatible to ICS85352I
* FMAX ≤ 500 MHz
* Propagation Delay < 4ns
* Output-to-output skew < 100ps
* 12 pairs of differential LVPECL outp.
are datacommunications and telecommunications.
Block Diagram
SEL [0:11]
CLK0 /CLK0 CLK1 /CLK1
12
0 1
0 1
Q0 /Q0
Q11 .
The PI6C485352 is a high-performance low-skew LVPECL fanout buffer. PI6C485352 features two selectable differential inputs and translates to twelve LVPECL output pairs. The inputs can also be conigured to single-ended with external resistor bias circ.
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