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  ON Semiconductor Electronic Components Datasheet  

NB7HQ14M Datasheet

2.5V 7GHz / 10Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer

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NB7HQ14M
2.5V 7GHz / 10Gbps
Differential Input to 1.8V /
2.5V 1:4 CML Clock / Data
Fanout Buffer w/ Selectable
Input Equalizer
MultiLevel Inputs w/ Internal Termination
Description
The NB7HQ14M is a high performance differential 1:4 CML fanout
buffer with a selectable Equalizer receiver. When placed in series with
a Clock /Data path operating up to 7 GHz or 10 Gb/s, respectively, the
NB7HQ14M inputs will compensate the degraded signal transmitted
across a FR4 PCB backplane or cable interconnect and output four
identical CML copies of the input signal. Therefore, the serial data rate
is increased by reducing InterSymbol Interference (ISI) caused by
losses in copper interconnect or long cables. The EQualizer ENable
pin (EQEN) allows the IN/IN inputs to either flow through or bypass
the Equalizer section. Control of the Equalizer function is realized by
setting EQEN; When EQEN is set Low, the IN/IN inputs bypass the
Equalizer. When EQEN is set High, the IN/IN inputs flow through the
Equalizer. The default state at startup is LOW. As such, NB7HQ14M
is ideal for SONET, GigE, Fiber Channel, Backplane and other
Clock/Data distribution applications.
The differential inputs incorporate internal 50 W termination
resistors that are accessed through the VT pin. This feature allows the
NB7HQ14M to accept various logic level standards, such as LVPECL,
CML or LVDS. The outputs have the flexibility of being powered by
either a 2.5 V or 1.8 V supply. The 1:4 fanout design was optimized
www.DatfaoSrhleoewt4Uou.ctopmut skew applications.
The NB7HQ14M is a member of the GigaCommfamily of high
performance clock products.
Features
Input Data Rate > 10 Gb/s
Input Clock Frequency > 7 GHz
150 ps Typical Propagation Delay
35 ps Typical Rise and Fall Times
< 15 ps Maximum Output Skew
< 0.8 ps Maximum RMS Clock Jitter
< 10 ps pp of Data Dependent Jitter
Differential CML Outputs, 400 mV PeaktoPeak, Typical
Selectable Input Equalization
Operating Range: VCC = 2.375 V to 2.625 V, VCCO = 1.71 V to
2.625 V
Internal Input Termination Resistors, 50 W
40°C to +85°C Ambient Operating Temperature
These are PbFree Devices
http://onsemi.com
1
QFN16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
NB7H
Q14M
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
SIMPLIFIED BLOCK DIAGRAM
EQ
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
May, 2009 Rev. 0
1
Publication Order Number:
NB7HQ14M/D


  ON Semiconductor Electronic Components Datasheet  

NB7HQ14M Datasheet

2.5V 7GHz / 10Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer

No Preview Available !

MultiLevel Inputs
LVPECL, LVDS, CML
IN
50 W
VT
IN 50 W
VREFAC
VCC
GND
EQEN
(Equalizer Enable)
NB7HQ14M
75 kW
0
2:1
MUX
EQ 1
CML Outputs
VCC0
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Figure 1. Detailed Block Diagram of NB7HQ14M
www.DataSheet4U.com
http://onsemi.com
2


Part Number NB7HQ14M
Description 2.5V 7GHz / 10Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer
Maker ON Semiconductor
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NB7HQ14M Datasheet PDF






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