NB7L1008 - 2.5V / 3.3V 1:8 LVPECL Fanout Buffer

Description

fanout buffer.

The NB7L1008 produces eight identical output copies of Clock or Data operating up to 7 GHz or 12 Gb/s, respectively.

Features

Typical Maximum Input Data Rate > 12 Gb/s Typical.
Data Dependent Jitter < 15 ps.
Maximum Input Clock Frequency > 7 GHz Typical.
Random Clock Jitter < 0.8 ps RMS.
Low Skew 1:8 LVPECL Outputs, < 20 ps max.
Multi.
Level Inputs, accepts LVPECL, CML, LVDS.
160 ps Typical Propagation Delay.
50 ps Typical Rise and Fall Times.
Differential LVPECL Outputs, 750 mV Peak.
to.
Peak, Typical.
Opera.

ON Semiconductor

📥 Download Datasheet

Datasheet Details

Part number	NB7L1008
Manufacturer	ON Semiconductor
File Size	179.81 KB
Description	2.5V / 3.3V 1:8 LVPECL Fanout Buffer
Datasheet	NB7L1008 Datasheet
Additional preview pages of the NB7L1008 datasheet.

📁 Similar Datasheet

NB7200GM - 2-cell Li-ion Battery Protection (Nisshinbo)
NB7232 - Fully compatible with earlier (ETC)

Other Datasheets by ON Semiconductor

NB7L1008M - a high performance differential 1:8 Clock/Data fanout buffer
NB7L111M - 6.125Gb/s 1:10 Differential Clock/Data Driver
NB7L11M - 2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator
NB7L14 - 2.5V / 3.3V 7GHz/10Gbps Differential 1:4 LVPECL Fanout Buffer
NB7L14M - Differential 1:4 Clock/Data Fanout Buffer/Translator
NB7L216 - High Gain Receiver/Buffer/Translator
NB7L32M - Clock Divider w/CML Output and Internal Termination
NB7L572 - 2.5 V / 3.3 V Differential 4:1 Mux Input To 1:2 LVPECL Clock/Data Fanout/Translator

Full PDF Text Transcription

Click to expand full text

NB7L1008 2.5V / 3.3V 1:8 LVPECL Fanout Buffer Multi−Level Inputs w/ Internal Termination Description The NB7L1008 is a high performance differential 1:8 Clock/Data fanout buffer. The NB7L1008 produces eight identical output copies of Clock or Data operating up to 7 GHz or 12 Gb/s, respectively. As such, the NB7L1008 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The differential inputs incorporate internal 50 W termination resistors that are accessed through the VT pin. This feature allows the NB7L1008 to accept various logic standards, such as LVPECL, CML, LVDS logic levels. The VREFAC reference output can be used to rebias capacitor−coupled differential or single−ended input signals.

Published: Sep 1, 2015 |