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National Semiconductor Electronic Components Datasheet

Si4442DY Datasheet

N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages

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June 2003
LM2727/LM2737
N-Channel FET Synchronous Buck Regulator Controller
for Low Output Voltages
General Description
The LM2727 and LM2737 are high-speed, synchronous,
switching regulator controllers. They are intended to control
currents of 0.7A to 20A with up to 95% conversion efficien-
cies. The LM2727 employs output over-voltage and under-
voltage latch-off. For applications where latch-off is not de-
sired, the LM2737 can be used. Power up and down
sequencing is achieved with the power-good flag, adjustable
soft-start and output enable features. The LM2737 and
LM2737 operate from a low-current 5V bias and can convert
from a 2.2V to 16V power rail. Both parts utilize a fixed-
frequency, voltage-mode, PWM control architecture and the
switching frequency is adjustable from 50kHz to 2MHz by
adjusting the value of an external resistor. Current limit is
achieved by monitoring the voltage drop across the on-
resistance of the low-side MOSFET, which enhances low
duty-cycle operation. The wide range of operating frequen-
cies gives the power supply designer the flexibility to fine-
tune component size, cost, noise and efficiency. The adap-
tive, non-overlapping MOSFET gate-drivers and high-side
bootstrap structure helps to further maximize efficiency. The
high-side power FET drain voltage can be from 2.2V to 16V
and the output voltage is adjustable down to 0.6V.
Features
n Input power from 2.2V to 16V
n Output voltage adjustable down to 0.6V
n Power Good flag, adjustable soft-start and output enable
for easy power sequencing
n Output over-voltage and under-voltage latch-off
(LM2727)
n Output over-voltage and under-voltage flag (LM2737)
n Reference Accuracy: 1.5% (0˚C - 125˚C)
n Current limit without sense resistor
n Soft start
n Switching frequency from 50 kHz to 2 MHz
n TSSOP-14 package
Applications
n Cable Modems
n Set-Top Boxes/ Home Gateways
n DDR Core Power
n High-Efficiency Distributed Power
n Local Regulation of Core Power
Typical Application
© 2003 National Semiconductor Corporation DS200494
20049410
www.national.com


National Semiconductor Electronic Components Datasheet

Si4442DY Datasheet

N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages

No Preview Available !

Connection Diagram
20049411
14-Lead Plastic TSSOP
θJA = 155˚C/W
NS Package Number MTC14
Pin Description
BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate
drive. The voltage should be at least one gate threshold
above the regulator input voltage to properly turn on the
high-side N-FET.
LG (Pin 2) - Gate drive for the low-side N-channel MOSFET.
This signal is interlocked with HG to avoid shoot-through
problems.
PGND (Pins 3, 13) - Ground for FET drive circuitry. It should
be connected to system ground.
SGND (Pin 4) - Ground for signal level circuitry. It should be
connected to system ground.
VCC (Pin 5) - Supply rail for the controller.
PWGD (Pin 6) - Power Good. This is an open drain output.
The pin is pulled low when the chip is in UVP, OVP, or UVLO
mode. During normal operation, this pin is connected to VCC
or other voltage source through a pull-up resistor.
ISEN (Pin 7) - Current limit threshold setting. This sources a
fixed 50µA current. A resistor of appropriate value should be
connected between this pin and the drain of the low-side
FET.
EAO (Pin 8) - Output of the error amplifier. The voltage level
on this pin is compared with an internally generated ramp
signal to determine the duty cycle. This pin is necessary for
compensating the control loop.
SS (Pin 9) - Soft start pin. A capacitor connected between
this pin and ground sets the speed at which the output
voltage ramps up. Larger capacitor value results in slower
output voltage ramp but also lower inrush current.
FB (Pin 10) - This is the inverting input of the error amplifier,
which is used for sensing the output voltage and compen-
sating the control loop.
FREQ (Pin 11) - The switching frequency is set by connect-
ing a resistor between this pin and ground.
SD (Pin 12) - IC Logic Shutdown. When this pin is pulled low
the chip turns off the high side switch and turns on the low
side switch. While this pin is low, the IC will not start up. An
internal 20µA pull-up connects this pin to VCC.
HG (Pin 14) - Gate drive for the high-side N-channel MOS-
FET. This signal is interlocked with LG to avoid shoot-
through problems.
www.national.com
2


Part Number Si4442DY
Description N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages
Maker National Semiconductor
Total Page 22 Pages
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