DM54LS175 - Hex/Quad D Flip-Flops with Clear

Product Overview

National Semiconductor

Datasheet Details

Part number	DM54LS175
Manufacturer	National Semiconductor
File Size	174.66 KB
Description	Hex/Quad D Flip-Flops with Clear
Datasheet	DM54LS175 Datasheet
Note	This datasheet PDF includes multiple part numbers: DM54LS175, DM54LS175J. Please refer to the document for exact specifications by model.
Additional preview pages of the DM54LS175 datasheet.

Product details

Description

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic All have a direct clear input and the quad (175) versions feature complementary outputs from each flip-flop Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse When the clock inp

Features

Y LS174 contains six flip-flops with single-rail outputs Y LS175 contains four flip-flops with double-rail outputs Y Buffered clock and direct clear inputs Y Individual data input to each flip-flop Y.

📁 Similar Datasheet

DM54LS47 - BCD/7-Segment Decoder/Driver (MSI)
DM54LS48 - BCD/7-Segment Decoder/Driver (MSI)
DM54LS49 - BCD/7-Segment Decoder/Driver (MSI)
DM54L89A - 64-BIT READ/WRITE MEMORIES (ETC)
DM54141 - BCD / DECIMAL DECODERS / DRIVERS (MSI)
DM54155 - Dual 2-Line to 4-Line Decoders/Demultiplexers (ETC)
DM5441A - BCD / DECIMAL DECODERS / DRIVERS (MSI)
DM5446A - BCD/7-Segment Decoder/Driver (MSI)

Other Datasheets by National Semiconductor

DM54LS174 - Hex/Quad D Flip-Flops with Clear
DM54LS10 - Triple 3-Input NAND Gates
DM54LS109A - Dual Positive-Edge-Triggered J-K Flip-Flops with Preset/ Clear/ and Complementary Outputs
DM54LS11 - Triple 3-Input AND Gates
DM54LS112A - NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS
DM54LS125A - Quad TRI-STATE Buffers

Published: May 20, 2016 |