Full PDF Text Transcription for SY100ELT21L (Reference)
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SY100ELT21L. For precise diagrams, and layout, please refer to the original PDF.
SY100ELT21L 3.3V Differential LVPECL-to-LVTTL Translator Features • 3.3V Power Supply • 2.0 ns Typical Propagation Delay • Low Power • Differential LVPECL Inputs • 24 mA ...
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al Propagation Delay • Low Power • Differential LVPECL Inputs • 24 mA TTL Outputs • Flow-Through Pinouts • Available in 8-Lead SOIC Package General Description The SY100ELT21L is a single differential LVPECL-to-LVTTL translator that uses a single +3.3V power supply. Because LVPECL (low voltage positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and low skew single gate design make the ELT21L ideal for applications that require the translation of a clock or data signal where minimal space, low power, and low cost are critical. VBB allows a differential, single-ended, or A
SY100ELT21L Datasheet
