PL102-10 buffer equivalent, low skew output buffer.
requiring zero output-output skew, all the outputs must be equally loaded.
If the CLK(1-2) outputs are less loaded than .
The PL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOP or 6-pin SOT23 package. It has two outputs that are synchronized with the input. The synchronization is .
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 250.40KB)