PA7140 array equivalent, programmable electrically erasable logic array.
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Programmable Electrically Erasable Logic Array
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Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches - Up to 72 logic cell output functions .
- Integration of multiple PLDs and random logic - Buried counters, complex state-machines - Comparators, decoders, other.
The PA7140 is a member of the Programmable Electrically Erasable Logic (PEEL™) Array family based on ICT’s CMOS EEPROM technology. PEEL™ Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed .
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