9DBL06 Datasheet PDF (6-output 3.3V PCIe Zero-Delay Buffer)

Description

The 9DBL06 devices are 3.3V members of IDT's Full-Featured PCIe family.

The 9DBL06 supports PCIe Gen1-4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems.

Features

6.
1-200 MHz Low-Power (LP) HCSL DIF pairs.
9DBL0641 default ZOUT = 100.
9DBL0651 default ZOUT = 85.
9DBL06P1 factory programmable defaults Key Specifications.
PCIe Gen1-2-3-4 CC compliant in ZDB mode.
PCIe Gen2 SRIS compliant in ZDB mode.
Supports PCIe Gen2-3 SRIS in fan-out mode.
DIF cycle-to-cycle jitter.

Datasheet Details

Part number	9DBL06
Manufacturer	IDT
File Size	306.45 KB
Description	6-output 3.3V PCIe Zero-Delay Buffer
Datasheet	9DBL06 Datasheet

Part number

9DBL06

Manufacturer

IDT

File Size

306.45 KB

Description

6-output 3.3V PCIe Zero-Delay Buffer

Datasheet

9DBL06 Datasheet

📁 Similar Datasheet

Part Number	Description	Manufacturer
9DBL0641	Zero-Delay/Fanout Buffer	Renesas
9DBL0641C	2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers	Renesas
9DBL0651	Zero-Delay/Fanout Buffer	Renesas
9DBL0651C	2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers	Renesas
9DBL0242	Zero-Delay/Fanout Buffer	Renesas

Part Number

Description

Manufacturer

9DBL0641

Zero-Delay/Fanout Buffer

Renesas

9DBL0641C

2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers

Renesas

9DBL0651

Zero-Delay/Fanout Buffer

Renesas

9DBL0651C

2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers

Renesas

9DBL0242

Zero-Delay/Fanout Buffer

Renesas

Other Datasheets by IDT

Part Number	Description
9DBL0641	6-output 3.3V PCIe Zero-Delay Buffer
9DBL0643	6-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL0651	6-output 3.3V PCIe Zero-Delay Buffer
9DBL0653	6-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL02	2-output 3.3V PCIe Zero-Delay Buffer

Part Number

Description

9DBL0641

6-output 3.3V PCIe Zero-Delay Buffer

9DBL0643

6-output 3.3V LP-HCSL Zero-Delay Buffer

9DBL0651

6-output 3.3V PCIe Zero-Delay Buffer

9DBL0653

6-output 3.3V LP-HCSL Zero-Delay Buffer

9DBL02

2-output 3.3V PCIe Zero-Delay Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text

6-output 3.3V PCIe Zero-Delay Buffer 9DBL06 Description The 9DBL06 devices are 3.3V members of IDT's Full-Featured PCIe family. The 9DBL06 supports PCIe Gen1-4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems. It offers a choice of integrated output terminations providing direct connection to 85Ω or 100Ω transmission lines. The 9DBL06P1 can be factory programmed with a user-defined power up default SMBus configuration.