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9DBL02 - 2-output 3.3V PCIe Zero-Delay Buffer

Datasheet Details

Part number 9DBL02
Manufacturer IDT
File Size 288.27 KB
Description 2-output 3.3V PCIe Zero-Delay Buffer
Datasheet download datasheet 9DBL02 Datasheet

General Description

The 9DBL02 devices are 3.3V members of IDT's Full-Featured PCIe family.

The devices support PCIe Gen1-4 Common Clocked (CC) and PCIe Gen2 Separate Reference Independent Spread (SRIS) systems.

It offers a choice of integrated output terminations providing direct connection to 85 or 100 transmission lines.

Overview

2-output 3.3V PCIe Zero-Delay Buffer 9DBL02.

Key Features

  • 2.
  • 1-200 MHz Low-Power (LP) HCSL DIF pairs.
  • 9DBL0242 default ZOUT = 100.
  • 9DBL0252 default ZOUT = 85.
  • 9DBL02P2 factory programmable defaults.
  • Easy AC-coupling to other logic families, see IDT.