HY57V281620ELTP 16bit) equivalent, synchronous dram memory 128mbit (8m x 16bit).
* Voltage: VDD, VDDQ 3.3V supply voltage
* 4096 Refresh cycles / 64ms
* All device pins are compatible with LVTTL interface
* Programmable Burst Length .
which require wide data I/O and high bandwidth. HY57V281620E(L/S)T(P) series is organized as 4banks of 2,097,152 x 16.
H.
and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 1.4 / Aug. 2005
1
Synchronous DRAM Memory 128Mbit (8Mx16bit) HY57V281620E(L/S)T(P).
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