H5MS2562JFR 16bit) equivalent, mobile ddr sdram 256mbit (16m x 16bit).
SUMMARY
* Mobile DDR SDRAM
clock cycle
* MODE RERISTER SET, EXTENDED MODE REGISTER SET and STATUS REGISTER READ - Keep to the JEDEC Standard regulation (Low Pow.
which use the battery such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-n.
and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.2 / July. 2009 1
256Mbit MOBILE DDR SDRAM based on 4M x 4Bank x16 I/O
Document Title 256Mbit (4Ba.
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