GS8170DD36C sigmaram equivalent, double data rate sigmaram.
* Double Data Rate Read and Write mode
* Late Write; Pipelined read operation
* JEDEC-standard SigmaRAM™ pinout and package
* 1.8 V +150/
–.
where a data rate markedly faster than the RAM’s latency is desired, the Double Data Rate protocol doubles the data tran.
Because SigmaRAMs are synchronous devices, address data inputs and read/write control inputs are captured on the rising edge of the input clock. Write cycles are internally self-timed and initiated by the rising edge of the clock input. This feature .
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