GS8170DD18C-300 Description
Because SigmaRAMs are synchronous devices, address and read/write control inputs are captured on the rising edge of the input clock. Write cycles are internally self-timed and initiated by the rising edge of the clock input.
GS8170DD18C-300 Key Features
- Double Data Rate Read and Write mode
- JEDEC-standard SigmaRAM™ pinout and package
- 1.8 V +150/-100 mV core power supply
- 1.5 V or 1.8 V I/O supply
- Pipelined read operation
- Fully coherent read and write pipelines
- Echo Clock outputs track data output drivers
- ZQ mode pin for user-selectable output drive strength
- 2 user-programmable chip enable inputs for easy depth expansion
- IEEE 1149.1 JTAG-patible Boundary Scan