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Freescale Semiconductor Electronic Components Datasheet

PCF5271 Datasheet

32-bit Embedded Controller Division

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Freescale Semiconductor
Hardware Specification
MCF5271EC
Rev. 1.2, 12/2004
MCF5271 Integrated
Microprocessor
Hardware Specification
32-bit Embedded Controller Division
The MCF5271 family is a highly integrated
implementation of the ColdFire® family of reduced
instruction set computing (RISC) microprocessors. This
document describes pertinent features and functions of
the MCF5271 family. The MCF5271 family includes the
MCF5271 and MCF5270 microprocessors. The
differences between these parts are summarized below in
Table 1. This document is written from the perspective of
the MCF5271 and unless otherwise noted, the
information applies also to the MCF5270.
The MCF5271 family combines low cost with high
integration on the popular version 2 ColdFire core with
over 96 (Dhrystone 2.1) MIPS at 100MHz. Positioned
for applications requiring a cost-sensitive 32-bit
solution, the MCF5271 family features a 10/100 Ethernet
MAC and optional hardware encryption to ensure the
application can be connected and protected. In addition,
the MCF5271 family features an enhanced Multiply
Accumulate Unit (eMAC), large on-chip memory (64
Kbytes SRAM, 8 Kbytes configurable cache), and a
32-bit SDR SDRAM memory controller.
Table of Contents
1 MCF5271 Family Configurations ..................... 2
2 Block Diagram ................................................. 2
3 Features .......................................................... 4
4 Signal Descriptions........................................ 12
5 Modes of Operation....................................... 16
6 Design Recommendations ............................ 19
7 Mechanicals/Pinouts and Part Numbers ....... 27
8 Preliminary Electrical Characteristics............ 32
9 Documentation .............................................. 55
Technical Data
© Freescale Semiconductor, Inc., 2004. All rights reserved.


Freescale Semiconductor Electronic Components Datasheet

PCF5271 Datasheet

32-bit Embedded Controller Division

No Preview Available !

MCF5271 Family Configurations
1 MCF5271 Family Configurations
Table 1. MCF5271 Family Configurations
Module
5270
5271
ColdFire V2 Core with EMAC and
Hardware Divide
xx
System Clock
100 MHz
Performance (Dhrystone/2.1 MIPS)
96
Instruction/Data Cache
8 Kbytes
Static RAM (SRAM)
64 Kbytes
Interrupt Controllers (INTC)
22
Edge Port Module (EPORT)
xx
External Interface Module (EIM)
xx
4-channel Direct-Memory Access (DMA)
x
x
SDRAM Controller
xx
Fast Ethernet Controller (FEC)
xx
Hardware Encryption
—x
Watchdog Timer (WDT)
xx
Four Periodic Interrupt Timers (PIT)
x
x
32-bit DMA Timers
44
QSPI
xx
UART(s)
I2C
33
xx
General Purpose I/O Module (GPIO)
x
x
JTAG - IEEE 1149.1 Test Access Port
x
x
Package
160 QFP,
160 QFP,
196 MAPBGA 196 MAPBGA
2 Block Diagram
The superset device in the MCF5271 family comes in a 196 mold array plastic ball grid array (MAPBGA)
package. Figure 1 shows a top-level block diagram of the MCF5271.
MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2
2 Freescale Semiconductor


Part Number PCF5271
Description 32-bit Embedded Controller Division
Maker Freescale Semiconductor
Total Page 30 Pages
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