56F803 Overview
of Change Added revision history. Added this text to footnote 2 in Table 3-8: “However, the high pulse width does not have to be any particular percent of the low pulse width.” 56F803 General Description Up to 40 MIPS at 80MHz core frequency DSP and MCU functionality in a unified, C-efficient architecture Hardware DO and REP loops MCU-friendly instruction set supports both DSP and controller functions:.
