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Fairchild Semiconductor Electronic Components Datasheet

74ALVCH16244 Datasheet

Low Voltage 16-Bit Buffer/Line Driver with Bushold

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September 2001
Revised February 2002
74ALVCH16244
Low Voltage 16-Bit Buffer/Line Driver with Bushold
General Description
The ALVCH16244 contains sixteen non-inverting buffers
with 3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The ALVCH16244 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The 74ALVCH16244 is designed for low voltage (1.65V to
3.6V) VCC applications with output capability up to 3.6V.
The 74ALVCH16244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.65V to 3.6V VCC supply operation
s 3.6V tolerant control inputs and outputs
s Bushold on data inputs eliminating the need for external
pull-up/pull-down resistors
s tPD
3 ns max for 3.0V to 3.6V VCC
3.7 ns max for 2.3V to 2.7V VCC
6.0 ns max for 1.65V to 1.95V VCC
s Uses patented noise/EMI reduction circuitry
s Latch-up conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number
Package
Number
Package Description
74ALVCH16244T
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OEn
I0I15
O0O15
Description
Output Enable Input (Active LOW)
Bushold Inputs
Outputs
© 2002 Fairchild Semiconductor Corporation DS500625
www.fairchildsemi.com


Fairchild Semiconductor Electronic Components Datasheet

74ALVCH16244 Datasheet

Low Voltage 16-Bit Buffer/Line Driver with Bushold

No Preview Available !

Connection Diagram
Truth Tables
Inputs
OE1
L
L
H
I0–I3
L
H
X
Inputs
OE3
L
L
H
I8-I11
L
H
X
Outputs
O0–O3
L
H
Z
Outputs
O8–O11
L
H
Z
Inputs
OE2
L
L
H
I4-I7
L
H
X
Outputs
O4-O7
L
H
Z
Functional Description
The 74ALVCH16244 contains sixteen non-inverting buffers
with 3-STATE outputs. The device is nibble (4 bits) con-
trolled with each nibble functioning identically, but indepen-
dent of each other. The control pins may be shorted
together to obtain full 16-bit operation.The 3-STATE out-
Logic Diagram
Inputs
Outputs
OE4
I12-I15
O12-O15
LL
L
LH
H
HX
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
Z
puts are controlled by an Output Enable (OEn) input. When
OEn is LOW, the outputs are in the 2-state mode. When
OEn is HIGH, the standard outputs are in the high imped-
ance mode but this does not interfere with entering new
data into the inputs.
www.fairchildsemi.com
2


Part Number 74ALVCH16244
Description Low Voltage 16-Bit Buffer/Line Driver with Bushold
Maker Fairchild Semiconductor
Total Page 6 Pages
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