M52D5123216A dram equivalent, mobile synchronous dram.
* 1.8V power supply
* LVCMOS compatible with multiplexed address
* Four banks operation
* MRS cycle with address key programs
- CAS Latency (2, 3) - Burst.
BALL CONFIGURATION (TOP VIEW)
(BGA 90, 8mmX13mmX1.0mm Body, 0.8mm Ball Pitch)
1
2
3 456 7
8
9
A DQ26 DQ24 VSS
V.
The M52D5123216A is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 32 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on every clock cycle..
Image gallery
TAGS
Download