CY7C1424JV18 architecture equivalent, 36-mbit ddr-ii sio sram 2-word burst architecture.
*
*
*
*
*
Functional Description
The CY7C1422JV18, CY7C1429JV18, CY7C1423JV18, and CY7C1424JV18 are 1.8V Synchronous Pipelined SRAMs, equipped with D.
The CY7C1422JV18, CY7C1429JV18, CY7C1423JV18, and CY7C1424JV18 are 1.8V Synchronous Pipelined SRAMs, equipped with Double Data Rate Separate I/O (DDR-II SIO) architecture. The DDR-II SIO consists of two separate ports: the read port and the write por.
Image gallery
TAGS
Manufacturer
Related datasheet