AD9142 converter equivalent, digital-to-analog converter.
Very small inherent latency variation: <2 DAC clock cycles Proprietary low spurious and distortion design 6-carrier GSM ACLR = 79 dBc at 200 MHz IF SFDR > 85 dBc (bandwid.
including complex digital modulation, input signal power detection, and gain, phase, and offset compensation. The DAC o.
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