Very small inherent latency variation: <2 DAC clock cycles Proprietary low spurious and distortion design 6-carrier GSM ACLR = 79 dBc at 200 MHz IF SFDR > 85 dBc (bandwid.

including complex digital modulation, input signal power detection, and gain, phase, and offset compensation. The DAC o.

The AD9142 is a dual, 16-bit, high dynamic range digital-toanalog converter (DAC) that provides a sample rate of 1600 MSPS, permitting a multicarrier generation up to the Nyquist frequency. The AD9142 TxDAC+® includes features optimized for direct co.

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