AD9146 Datasheet | Analog Devices

FEATURES Flexible LVDS interface allows byte or nibble load Single-carrier W-CDMA ACLR = 80 d Bc at 122.88 MHz IF Analog output: adjustable 8.7 m A to 31.7 m A, RL = 25 Ω to 50 Ω Integrated 2×/4× interpolator/plex modulator allows carrier placement anywhere in the DAC bandwidth Gain, dc offset, and phase adjustment for sideband suppression Multiple chip synchronization interfaces High performance, low noise PLL clock multiplier Digital inverse sinc filter Low power: 1.2 W at 1.0 GSPS, 800 m W at 500 MSPS, full operating conditions 48-lead, exposed paddle LFCSP APPLICATIONS Wireless infrastructure W-CDMA, CDMA2000, TD-SCDMA, Wi MAX, GSM, LTE Digital high or low IF synthesis Transmit diversity Wideband munications: LMDS/MMDS, point-to-point GENERAL DESCRIPTION The AD9146 is a dual, 16-bit, high dynamic range digital-toanalog converter (DAC) that provides a sample rate of 1000 MSPS with nominal supplies...